|
|
|
W. Mark Vanfleet |
BACK TO LIST
|
|---|---|
|
|
|
| W. Mark Vanfleet is a Senior Information Security (INFOSEC) Systems Security Analyst for the Department of Defense (DoD). Vanfleet holds a patent in reverse engineering ASIC Chips for Legacy Systems, a second patent in Satisfiability. Vanfleet has been researching Multiple Independent Levels of Security/Safety (MILS) architectures, formal methods, and high assurance evaluation techniques for 15 years. The MILS Architecture that Vanfleet helped to pioneer is being planned for use with in many DoD Systems Platforms including F-22, F-35, Joint Tactical Radio System (JTRS), etc. He is certified as a Senior INFOSEC Systems Security Analyst and holds certificates in Software Engineering Process and Practice within the DoD. Vanfleet earned a BS in Computer Science from the University of Utah and an MS in Mathematical Statistics from the University of Utah. | |
|
W. Mark Vanfleet 9800 Savage Rd Ste 6709 Fort George G Meade, MD 20755-6709 |
Phone: 410 854-6361 Email: wvanflee@restarea.ncsc.mil |
| Abstracts: | |
| MILS/MSL/MLS Deeply Embedded Architectures | |
| | |
|
TECHNICAL TRACKS ||
EXHIBITOR INFORMATION PARTICIPANT INFORMATION CO-SPONSORS || SEARCH PROCEEDINGS HOME © 2003 [Utah State University]. All rights reserved. |
|